The invention relates to a process for converting an analogue signal into a logic signal.
A logic signal is a rectangular signal which can take two values only, a low value and a high value. The operation of converting an analogue signal into a logic signal consists in comparing at each instant the value of the analogue signal with a threshold and in imparting the low value when the analogue signal is less than the threshold and the high value when the analogue signal exhibits a value greater than the threshold.
The threshold is an analogue level which depends on the characteristics of the analogue input signal, for example the average value of the signal or the average of the peak amplitudes (maximum and minimum).
This conversion operation presents no difficulty when the average value of the analogue signal is constant. It is also known to adapt the threshold to slow fluctuations of the analogue signal. On the other hand, the conversion processes used hitherto do not make it possible to adapt to fast and/or frequent fluctuations of the amplitudes of analogue signals. In particular, the signals emanating from computer graphics cards or workstations deliver analogue signals whose amplitude transitions are variable.
The invention is characterized in that the optimum comparison threshold allowing the transformation of this analogue signal into a logic signal is determined in a quasi-instantaneous manner and for each transition of the analogue signal.
In one embodiment for which the analogue signal exhibits porches separated by alternating rising and falling transitions, with rise or fall time Tr, upon the appearance of the porch immediately following the transition, the threshold is determined, this being an average value of the amplitudes of the two porches on either side of the transition, this threshold being maintained for a first duration Tm, and
the analogue signal to be converted is delayed by a second duration chosen such that Tm greater than Td so that the comparison threshold is present in the central region of the transition.
In this way, the rectangular signal (logic signal) can exhibit only a slight shift with respect to the analogue signal.
In a particularly simple mode of operation of this arrangement, the threshold signal is obtained by the addition of a first signal which is the signal to be converted and of a second signal, identical to this first signal, but delayed by twice the second duration (Td), the porch of the first signal before the transition having a level substantially equal to the level of the corresponding porch of the signal to be converted, and the porch of this first signal, after the transition, exhibiting a level substantially equal to the arithmetic mean of the levels of the porches of the signal to be converted on either side of the transition.
In this case, the threshold signal exhibits a stable porch between, on the one hand, the instant Tr where the analogue signal to be converted reaches the second porch and, on the other hand, the instant 2Td of the start of the second signal (added to the first). The analogue signal delayed by the duration Td is compared with the superposed signals between the instants Td and Td+Tr. Under these conditions, the comparison threshold signal does indeed exhibit, for the duration of the transition of the signal delayed by the duration Td, a stable porch.
For the implementation of this process, in a preferred embodiment, use is made of a transmission line (or delay line) which is not matched at its end and whose transmission duration, or delay of the line, has the value Td and the analogue signal to be converted is applied to the input of the line by way of a resistor of a value substantially equal to the characteristic impedance of the line.
In this embodiment, the addition signal appears at the input of the transmission line. Specifically, this input signal is the sum, on the one hand, of an incident wave in phase with the analogue input signal but of half the amplitude and, on the other hand, of a reflected wave which corresponds to this incident wave with a delay of duration 2Td. The reflected wave is due to the total reflection off the open circuit at the extremity of the line. Furthermore, the delayed signal appears at the extremity of the line. Thus, it is possible to make the comparison between the signal at the input of the line and the signal at the output of this line and the rectangular signal is the output signal from a comparator whose inputs receive these signals.
The transmission line can consist of a passive or active delay line, a coaxial cable, a strip line or a microstrip line.
Given that in order to transform an analogue signal into a logic signal, use is conventionally made of a comparator which delivers, on the one hand, a signal of a first value when the amplitude of a first input is greater than the amplitude of the second input and, on the other hand, a signal of a second value when the amplitude of the first input is less than that of the second input, it is preferable to make arrangements such that, outside of the transition periods, the signals to be compared exhibit substantially different amplitudes which confirm the output signal from the comparator.
For this purpose, in a first embodiment a shift is added to one of the signals to be compared, preferably the signal originating from the input of the line, this shift changing direction when the output signal from the comparator changes state.
In a second embodiment, the comparison is disabled outside of the periods of transition of the analogue signal to be converted.
The present invention provides a process for converting a signal exhibiting alternating rising and falling transitions, into a rectangular signal exhibiting a single low value and a single high value, the switchover from the low value to the high value, or conversely, occurring when the signal to be transformed exceeds a threshold or falls below the threshold, the threshold being determined on each transition of the signal to be converted.
According to one embodiment, since the signal to be converted exhibits porches between the transitions, a value which is substantially equal to the average of the amplitudes of the porches on either side of the transition is conferred on the threshold.
According to one embodiment, in order to determine the instant of transition from the low value to the high value, or vice versa, of the rectangular signal, on each transition of the signal to be converted, the value of the threshold is maintained for a first duration from the start of the porch of the signal to be converted which occurs after the transition, and this threshold is compared with the transition of the signal to be converted, delayed by a second duration, the first and second durations being chosen in such a way that the threshold appears in the middle region of the signal to be converted, delayed by the second duration.
According to one embodiment, the threshold is maintained up to an instant which corresponds to twice the second duration after the transition of the signal to be converted.
According to one embodiment, in order to produce the threshold, a signal is produced which is formed from the sum, on the one hand, of a first signal in phase with the signal to be converted, but of half the amplitude and, on the other hand, of a second signal identical to this first in-phase signal, but delayed by a duration which is greater than the largest of the durations of transition allowable for the signal to be converted.
The invention furthermore provides a device for implementing the process, which comprises:
a transmission line, or delay line, whose input receives the signal to be converted by way of an impedance of value substantially equal to the value of its characteristic impedance, and
a comparator whose inputs are linked respectively to the input and to the output of the transmission line.
According to one embodiment, the device includes means for preventing the toggling of the signal on the output of the comparator outside of the periods of transition of the first delayed signal to be compared with the threshold.
According to one embodiment, a value is added to the signal on one of the inputs of the comparator, which value makes it possible to confirm the output signal from the comparator, outside of the periods of transition of the delayed signal to be converted.
According to one embodiment, a feedback circuit is provided between the output of the comparator and an input of this comparator.
According to one embodiment, the feedback circuit includes an attenuator, preferably adjustable.
According to one embodiment, the device includes a means for superimposing an offset signal onto the signal to be converted so that the values or shifts confirming the output signal from the comparator are substantially symmetric with respect to the average output signal from the comparator.
According to one embodiment, the device includes a means for allowing a toggling of the signal on the output of the comparator only during transitions of the delayed signal to be converted, the comparator being disabled outside of the periods of authorization, the signal on its outputs being unable to change state during the disabling periods.
According to one embodiment, the comparator is disabled in respect of a transition of the signal to be converted which has the same direction as the transition of an immediately preceding transition.
According to one embodiment, the comparator is disabled in respect of a transition for which the amplitude of the transition is less than a determined value.
According to one embodiment, the device includes a differentiator which differentiates the signal to be converted and a comparator for comparing the differentiated signal with a reference.
According to one embodiment, on the basis of the output signal from the comparator, a pulse for enabling the main comparator is created, this pulse having a startup instant and a duration which are such that the enabling of the main comparator occurs only during the periods of transition of the delayed signal to be converted.
According to one embodiment, in order to create an enabling pulse, an exclusive OR gate is provided, a first input of which is linked to the output of the comparator of the enabling circuit and the second input of which is linked to the output of this comparator of the enabling circuit by way of a delay element.
The present invention also provides an application of the process to the shaping of signals emanating from computer graphics cards or workstations.